| Pin |
記号 |
功能定義 |
| 1-4 |
NC |
No connection |
| 5 |
GND |
Power Ground |
| 6 |
NC |
No connection |
| 7 |
VCC |
Power voltage |
| 8 |
NC
(MODE) |
Input timing mode selection. Effective when FCS=1.
| MODE |
Function |
Note |
| 0 |
DE only |
- |
| 1 |
HS+VS |
Default |
|
| 9 |
DE |
Data enable signal for TTL mode. |
| 10 |
VS |
Vertical sync input |
| 11 |
HS |
Horizontal sync input |
| 12 |
B7 |
Blue data(MSB) |
| 13 |
B6 |
Blue data |
| 14 |
B5 |
Blue data |
| 15 |
B4 |
Blue data |
| 16 |
B3 |
Blue data |
| 17 |
B2 |
Blue data |
| 18 |
B1 |
Blue data |
| 19 |
B0 |
Blue data(LSB) |
| 20 |
G7 |
Green data(MSB) |
| 21 |
G6 |
Green data |
| 22 |
G5 |
Green data |
| 23 |
G4 |
Green data |
| 24 |
G3 |
Green data |
| 25 |
G2 |
Green data |
| 26 |
G1 |
Green data |
| 27 |
G0 |
Green data(LSB) |
| 28 |
R7 |
Red data(MSB) |
| 29 |
R6 |
Red data |
| 30 |
R5 |
Red data |
| 31 |
R4 |
Red data |
| 32 |
R3 |
Red data |
| 33 |
R2 |
Red data |
| 34 |
R1 |
Red data |
| 35 |
R0 |
Red data (LSB) |
| 36 |
GND |
Power Ground |
| 37 |
DCLK |
Sample clock |
| 38 |
GND |
Power Ground |
| 39 |
NC
(L/R) |
Horizontal shift direction (source output) selection. Effective when FCS=1.
| L/R |
Source output sequence and data order |
Note |
| 1 |
SOUT1→SOUT2→ …→ SOUT2400 |
Default |
| 0 |
SOUT2400→SOUT2399→ …→ SOUT1 |
- |
|
| 40 |
NC
(U/D) |
Vertical shift direction (gate output) selection. Effective when FCS=1.
| U/D |
Function |
Note |
| 1 |
Top→bottom |
Default |
| 0 |
Bottom→top |
- |
|
| 41 |
NC |
No connection |
| 42 |
NC |
No connection |
| 43 |
NC |
No connection |
| 44 |
RESET |
Reset pin. The chip is in reset state when RESETB=0. |
| 45 |
NC |
No connection |
| 46 |
NC |
No connection |
| 47 |
DITHB |
STBYB Standby mode setting pin. The chip is in standby mode when STBYB=0. |
| 48 |
GND |
Power Ground |
| 49 |
NC |
No connection |
| 50 |
NC |
No connection |
