| Pin No. |
符号 |
输入/输出 |
功能说明 |
| 1 |
IF1 |
I |
Input data format control (Note1) |
| 2 |
IF2 |
I |
Input data format control (Note1) |
| 3 |
POL |
O |
Polarity Signal connect to VCOM driving circuit. |
| 4 |
RESET |
I |
Hardware reset. |
| 5 |
SPENA |
I |
Chip select |
| 6 |
SPCL |
I |
Serial Clock |
| 7 |
SPDA |
I/O |
Serial Data |
| 8 |
B0 |
I |
Blue Data bit (LSB) |
| 9 |
B1 |
I |
Blue Data bit |
| 10 |
B2 |
I |
Blue Data bit |
| 11 |
B3 |
I |
Blue Data bit |
| 12 |
B4 |
I |
Blue Data bit |
| 13 |
B5 |
I |
Blue Data bit |
| 14 |
B6 |
I |
Blue Data bit |
| 15 |
B7 |
I |
Blue Data bit(MSB) |
| 16 |
G0 |
I |
Green Data bit(LSB) |
| 17 |
G1 |
I |
Green Data bit |
| 18 |
G2 |
I |
Green Data bit |
| 19 |
G3 |
I |
Green Data bit |
| 20 |
G4 |
I |
Green Data bit |
| 21 |
G5 |
I |
Green Data bit |
| 22 |
G6 |
I |
Green Data bit |
| 23 |
G7 |
I |
Green Data bit(MSB) |
| 24 |
R0 |
I |
Red Data bit(LSB) |
| 25 |
R1 |
I |
Red Data bit |
| 26 |
R2 |
I |
Red Data bit |
| 27 |
R3 |
I |
Red Data bit |
| 28 |
R4 |
I |
Red Data bit |
| 29 |
R5 |
I |
Red Data bit |
| 30 |
R6 |
I |
Red Data bit |
| 31 |
R7 |
I |
Red Data bit(MSB) |
| 32 |
Hsync |
I |
Horizontal synchronous signal |
| 33 |
Vsync |
I |
Vertical synchronous signal |
| 34 |
Data CLK |
I |
Dot data clock |
| 35 |
AVDD |
I |
4.5V~5.5V |
| 36 |
AVDD |
I |
4.5V~5.5V |
| 37 |
Vcc |
I |
3V~3.6V |
| 38 |
Vcc |
I |
3V~3.6V |
| 39 |
NPC |
O |
NTSC/PAL mode Auto detection result H:NTSC/L:PAL |
| 40 |
VGL |
I |
Gate off power |
| 41 |
VGL |
I |
Gate off power |
| 42 |
UD |
I |
Up/Down scan setting. H: Reverse scan / L: Normal scan |
| 43 |
VGH |
I |
Gate on power |
| 44 |
LRC |
I |
Shift direction of device internal shift register control. |
| 45 |
GND |
I |
GROUND |
| 46 |
VCOM |
I |
VCOM driving input |
| 47 |
VCOM |
I |
VCOM driving input |
| 48 |
ENB |
I |
Data enable input. Normally pull low. |
| 49 |
GND |
I |
GROUND |
| 50 |
GND |
I |
GROUND |